Floating Point Addition / Subtraction

Floating Point Representation in digital systems follows the IEEE-754 format. Let us see how to perform addition / subtraction on floating numbers represented in this format.

FPGA Timing Analysis using Xilinx Vivado

FPGA (Field Programmable Array) consists of the following: Reprogrammable Logic Blocks, Programmable Interconnects and I/O blocks. Let us look at how timing analysis can be performed using Xilinx Vivado Tool.

ASIC Synthesis using Synopsys Design Compiler

Synthesis is defined as the process of converting a synthesizable HDL code into a Gate level netlist using various specifications and parameters obtained from the Design Library.

Restoring Division Verilog Code

 Restoring Division Algorithm is one of the division algorithms used for performing division in digital systems. Let us see how to write the Verilog code for Restoring Division method in FSM format.

Booth Multiplier Verilog Code

Booth's Multiplication Algorithm is a commonly used algorithm for multiplication of two signed numbers. Let us see how to write a Verilog code for this algorithm in an FSM format.

Verilog VPP Switch

In this post, we will see how the verilog vpp file can be used to implement different combinations of defines to generate different designs each time.

SPI Protocol Notes

Serial Peripheral Interface or SPI Protocol is one of the simplest serial protocols used for on-chip communication. 

In this post, we will discuss basic concepts of SPI protocol with some short notes.