SPI Protocol Notes

Serial Peripheral Interface or SPI Protocol is one of the simplest serial protocols used for on-chip communication. 

In this post, we will discuss basic concepts of SPI protocol with some short notes.

SPI Protocol is a standard industrial communication protocol used to interface different kinds of devices. The protocol is tweaked in various applications to achieve the desired performance.

Main signals used:

SCLK - Serial Clock

SS - Slave Select

MOSI - Master Out Slave In

MISO - Master In Slave Out

Block Diagram:

Working:

1. Firstly, the SPI master configures the serial clock (SCLK) based on frequency and mode of operation.
2. Slave Select (SS) signal is asserted low to inidicate that the master has selected a slave to begin communication.
3. Now SCLK is sent out by the master. All data transmission is synchronous to this clock.
4. Let us consider a write operation to the slave. If an address is to be sent, it is sent by the master followed by write data using MOSI pin. 
5. For read operation, the address is sent across on MOSI and the read data is obtained on the MISO pin.

Improvements:

1. The standard SPI protocol consists of 1-bit serial lines MISO and MOSI. To improve the rate of transfer, 4-bit parallel lines (Quad) and 8-bit lines (Octal) have been introduced for higher performance. This is called the xSPI (Extended SPI) protocol.
2. Double Data Rate (DDR) mode is also in common use for data transfer at the rising as well as falling edge of the clock.

Clock Modes:

The SPI protocol allows 4 modes of operation based on the SCLK configuration. The two parameters under this are Clock Polarity (CPOL) and Clock Phase (CPHA).

Clock Polarity is distinguished by the stable state of SCLK when it is not toggling.

If this stable state is 1, then CPOL = 1 otherwise CPOL = 0.

Clock Phase is defined by which edge of SCLK (rising/falling) is used to sample the data on MOSI.

If rising edge is used, then CPHA = 0, otherwise for falling edge CPHA = 1.

Memory Controller Applications:

SPI Protocol interface can be used to control Flash memories from different vendors. A number of Flash models are available from Cypress, Adesto, Micron etc. which can be controlled using xSPI signals. Cypress has also introduced HyperFlash memory to provide high speed data transfers. This works only in the Octal (8-bit) DDR mode.