Saturday, June 13, 2020

Memory Addressing and Wrap concepts

Memory Addressing is one of the most fundamental concepts in VLSI and yet, many people get confused when asked simple questions regarding this.
Here, let me cover some important points regarding memory address space, dividing the address space and also basics of wrap concept.

Basically, the simplest unit of memory access is one byte. We usually represent memory addresses in hexadecimal notation. 
Eg. 0x00, 0x01, 0x02 and so on for continuous byte addressing.
This type of memory is called a Byte Addressable memory.
It means that we can store and read one byte of data at every address location of the memory.

If we can provide a single address and store/read 32-bits (4-bytes) of data at a time, it is called a Dword Addressable memory.
(Dword or double word = 32-bits assuming that word = 16-bits)

Below is an example waveform of a Dword Addressable memory:

Dword addressable memory simulation waveform









So on providing a single address, it gives us 4 bytes of data.
Due to this, address also has to be incremented by 4 (as we said, a single address holds only 1-byte of data).
So Dword addressable memory addresses are of the form: 0x00, 0x04, 0x08, 0x0C and so on.
The below table summarizes the Dword address for a particular Byte address:
           External address     Dword address
         0x00                   0
          0x04                   1 
         0x08                   2
            0x0C                   3   

In the above waveform, the external address has been converted from Byte Address to the Dword address (every address increment by 4 has been converted to increments of 1).
How to do that? Discard the last 2 LSBits from the external address and you get the Dword address.

The addresses 0x00, 0x04, 0x08, 0x0C for Dword addressable memory are called aligned addresses to the Dword Addressable memory as every Dword will start from that address.
Any other address such as 0x02, 0x03, 0x07 are all called unaligned addresses to the Dword Addressable memory because these addresses do not give us the starting byte of a Dword data.

However, the above Dword memory converts all unaligned addresses (External byte address) to the previous Dword aligned address (Dword address) before writing/reading the data.


Question 1:
What is the start and end address of a 4 KB memory in Hex?
As said earlier, we must represent addresses in the hexadecimal format.
Now, 1 kilobyte = 1024 bytes = 2^10 bytes
So 4 KB will have 2^10 * 2^2 = 2^12 bytes.

2^12 bytes of memory means 2^12 locations can be accessed in the memory.
For this, we require 12 bits to access all the locations.
In hexadecimal, each digit represents 4 binary bits. So 3 hex digits will cover 12 bits.
Memory addresses in hex: 000 to FFF for a 4kB memory.
Start address = 0x000
End address = 0xFFF


Question 2:
Divide a 4 GB memory space equally for 8 slave devices. What is the address range for each device?
4 GB = 2^32 = 32 bits to represent the memory space
In hex, 0000 0000 to FFFF FFFF represents 4 GB space.
Divide by 8, we get 512 MB = 2^29 = 1FFF FFFF increment each time for 8 slaves.

Address spacing for each slave:
0000 0000 to 1FFF FFFF
2000 0000 to 3FFF FFFF
4000 0000 to 5FFF FFFF
6000 0000 to 7FFF FFFF
8000 0000 to 9FFF FFFF
A000 0000 to BFFF FFFF
C000 0000 to DFFF FFFF
E000 0000 to FFFF FFFF


Now let us consider Wrap operation.
Concept:
A wrap operation performs read/write starting from a start address, increments by size and reaches upto the wrap boundary.
After this, we move back to the lower wrap address. 
A wrap transfer is defined by wrap length and wrap size.
Note the following:
1. Start address of a wrap burst must be aligned to the size of the transfer.
2. The length of the burst must be 2,4,8 or 16.

Example:
Consider a 4-beat burst of 4-byte transfers.
(meaning length = 4 and size = 4 bytes)
Total size = 4*4 = 16 bytes. 
So address must wrap at every 16 byte boundary.
16 = 2^4. 
So wrap address starts and ends with 0000. (Four bits zeroes at the end)  
Note: 4-byte size transfers must be aligned to 4-byte boundaries (two bits zeroes at the end).

Eg. 0x20, 0x24, 0x28, 0x2c is a valid sequence of addresses for 4-beat burst of 4-byte transfers. After reaching 0x2c, we wrap back to 0x20.
For more information and examples, check this link:


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