Double Flop Synchronizer

When signals move from one clock domain to another, it may not be sampled correctly leading to unstable oscillations in the signal called metastability.

Double Flop Synchronizer or Two flip-flop synchronizer is the simplest synchronization technique to ensure that the signal is sampled correctly at the destination domain.

Memory Addressing and Wrap concepts

Memory Addressing is one of the most fundamental concepts in VLSI and yet, many people get confused when asked simple questions regarding this.

Here, let me cover some important points regarding memory address space, dividing the address space and also basics of wrap concept.

CSR Register operations using APB Protocol

This post is a continuation of the previous post in which the basic structure of CSR Registers were explained.

Here we will look at how reads and writes can be performed on Control and Status Registers using AMBA APB Protocol with Verilog code and explanations.

Control and Status Registers (CSR) Introduction

Control and Status Registers (CSR) are basically a collection of registers present in a system which can be read from/written to by the external device. It is more easily accessible than memories and form an important part of CPUs.

RTL Design Engineer Job Role

In this post I will outline all the job roles and responsibilities that come when donning the role of an RTL Design Engineer in a VLSI Industry.

IP-XACT and Kactus2 Tool

Kactus2 Tool is probably not a very familiar name going around in the VLSI industry. In this post, I will highlight why this tool is required and basics of XML handling using this tool.