AHB-Lite Protocol Quiz

ARM AMBA AHB-Lite protocol is a commonly used protocol for communication on a SoC chip. Here are a few quiz questions to test your knowledge on the AHB-Lite protocol. These concepts are useful to crack interview questions as well.

QUIZ

Question 1:
Consider that I am using a data bus width of 64-bits.
What are all the possible values that can be taken by HSIZE?

Question 2:
Consider the following scenario:

   HADDR=0x1834
   HBURST=3'b100
   HSIZE=3'b010

For this case, calculate the following:

a) Number of beats in the burst.
b) Number of bytes transferred in each beat of the burst.
c) Total number of bytes transferred in the burst.
d) What are the addresses for each beat of this burst?
e) Assume that first HADDR is now changed to 0x1832, with other parameters remaining same. Is this scenario possible, if so how many bytes are transferred in this case?

Question 3:
Consider the following read and write operations to a memory initiated from the AHB-Lite bus.

a) How many write and read bursts take place in this image?
b) Fill up the values of haddr at blank locations.
c) Fill up the values of hrdata at blank locations.
d) How many bytes of data are read by the slave during the read transaction?

Question 4:
Find the bug in the following waveform.
(R20 refers to read data output of address 0x20 and so on)

Question 5:
Given the scenario where the AHB signals are taken from a master-slave interface for a single-master multi-slave configuration.
Consider that hsel1 is the input to slave 1 and hreadyout arrives from slave 1.

a) How many write and read bursts take place to slave 1?
b) Why did slave 1 not respond to AR2 transaction and AR4 transaction?
c) Why does hready go low at clock edge 14 even though hreadyout is high?

Scroll down for solutions.
It is recommended to attempt all the questions before scrolling down to check your answers!

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SOLUTIONS

Answer 1:

For a data-bus width of 64-bits (8-bytes), we can have HSIZE values upto 8 bytes.

Possible values are: 3'b000, 3'b001, 3'b010, 3'b011

Answer 2:

a) HBURST = 3'b100. So, it is 8 beat wrapping burst.
b) HSIZE = 3'b010. It means 2^2 = 4 bytes are transferred in each beat of the burst.
c) Total number of bytes transferred in the burst = 8 * 4 = 32 bytes
d) Address for each beat of the burst = 0x1834, 0x1838, 0x183C, 0x1820, 0x1824, 0x1828, 0x182C, 0x1830.
e) This scenario is not possible as HADDR will become unaligned with respect to HSIZE. This is not allowed as per AHB-Lite protocol.

Answer 3:

a) 1 write burst and 1 read burst take place in the image.
b) HADDR blank values: 0x21, 0x22, 0x23.
c) HRDATA blank values: 0xDD, 0xCC, 0xBB, 0xAA, undefined (read burst is over after 4 data)
d) HBURST = 3 and HSIZE =0, so 4 beats * 1 byte = 4 data bytes are read by the slave.

Answer 4:
The issue is that the master has changed the address from 0x28 to 0x2C without waiting for hready.
Any address must be changed by the master only when slave is ready.
This is a protocol violation.

Answer 5:
a) 2 write bursts and 2 read bursts take place to slave 1.
b) htrans=busy for AR2 transaction and hsel1 is low for AR4 transaction. Slave will not execute the transaction in either case.
c) hreadyout is high because slave1 is not currently executing any transaction and it is ready.
    hready is a combined output of ready signals from all slaves. Some other slave may not be ready, which will cause the overall hready signal to go low.