A number of EDA tools are used in the VLSI industry for the compilation and simulation of HDL codes. Let us look at the common usage commands for popular EDA tools.
Example 1:
Example 2:
Example 3:
Example 1:
Vendor: Cadence
Simulation Tool: Xcelium
Waveform Tool: Simvision
Create a filelist with all the necessary files that are to be simulated and call it as filelist.f
In order to dump the signals to view the waveform, we add a small piece of code in the testbench file as follows:
initial begin $recordfile("wave.trn"); $recordvars(); end
To run the simulation using Cadence Xcelium tool, following command is used:
irun -f filelist.f +access+r
The waveform gets stored in a "trn" format which can be read by the cadence waveform viewer tool Simvision.
To view the waveform, we invoke the simvision tool using the following command:
simvision wave.trn &
Example 2:
Vendor: Mentor Graphics
Simulation Tool: Questa simulator
Let the top level design file be called top.vThe top level testbench file can be called tb_top.vCreate a filelist with all the necessary files that are to be simulated and call it as filelist.f
In order to dump the signals to view the waveform, we add the following piece of code in the testbench file:
initial
begin
$wlfdumpvars(0,tb_top);
end
The above code will dump the waveform in ".wlf" format which is used by vsim to read the waveform.
The below commands are used for the following processes in the same order:
Compilation, Optimization and Simulation
vlog –f filelist.f //Compilation
vopt tb_top.v +acc -o opt //Optimization
vsim -c -novopt tb_top -do "run -all; q" //Simulation
To view the waveform, we invoke the vsim tool using the following command:
vsim vsim.wlf &
Let the top level design file be called top.v
The top level testbench file can be called tb_top.v
In order to dump the signals to view the waveform, we add the following piece of code in the testbench file:
initial begin $wlfdumpvars(0,tb_top); end
Compilation, Optimization and Simulation
vlog –f filelist.f //Compilation vopt tb_top.v +acc -o opt //Optimization vsim -c -novopt tb_top -do "run -all; q" //Simulation
vsim vsim.wlf &
Example 3:
Vendor: Synopsys
Simulation Tool: VCS
Waveform Tool: Discovery Visual Environment
Create a filelist with all the necessary files that are to be simulated and call it as filelist.f
In order to dump the signals to view the waveform, we add the following piece of code in the testbench file:
initial
begin
$dumpfile("wave.vcd");
$dumpvars();
end
The above code will dump the waveform in ".vcd" format which is used by dve to read the waveform.
In order to dump the signals to view the waveform, we add the following piece of code in the testbench file:
initial begin$dumpfile("wave.vcd"); $dumpvars();end
Compilation command:
vcs -f filelist.f
Simulation Command:
./simv -l simulate.log
This will run the simulation and the data will be stored in simulate.log
vcs -f filelist.f
Simulation Command:
./simv -l simulate.log
This will run the simulation and the data will be stored in simulate.log
To view the waveform in synopsys tool, we can use the following command to open Discovery Visual Environment, following which the vcd file can be loaded:
dve &
This concludes the post on running a basic simulation with the popular EDA tools.
Note that the commands being used above can support many other arguments and complete details are listed in the respective user guides.
We have discussed the commands with commonly used arguments alone.
I will look to update this list with more useful commands in future.
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